Peripheral ≠ pin
USART2 is a circuit inside the MCU. PA2 is a physical pad. AF7 connects one possible UART signal to that pad. D1 is a label on a board connector; board bridges determine the copper route.
A HANDS-ON ATLAS / 01
Small steps.
Real understanding.
Follow a signal from your C code, through the chip,
to the pin you can actually touch.
CORTEX-M4 + FPUF446RE
180 MHz max / 512 KB Flash / 128 KB SRAM
Lessons start with the internal 16 MHz clock.01
BOARD EXPLORER
NUCLEO-F446RE MB1136
↑ ST-LINK USB / TOP
Loading board…Click a pin to inspect
Functional 3D layout, not a mechanical drawing. Lines show logical routes, not PCB copper. USB is at the top.
FOLLOW THE SIGNAL
A PHYSICAL CONNECTION ≠ A PERIPHERAL
The pin atlas.
Search the complete Morpho header map and the selected learning routes. Connector numbering is authoritative; the canvas is a functional layout.
PA2/PA3 → ST-LINK VCP by default. D1/D0 depend on SB62/SB63. A4/A5 and CN7-36/38 depend on solder bridges. Always check your board revision.
| MCU pin / net | Board connection | Learning routes | Clock / caution |
|---|
Register address finder
A focused index of the registers used in these benches. Use RM0390 for the full register map.
COUNT THE CLOCKS, NOT THE INSTRUCTIONS
The clock desk.
See how one source becomes several bus clocks. These are calculated teaching profiles, not readings from your board.
HSI input · 16 MHz
01 / TIMER
Choose a PWM frequency
TIM3 uses the APB1 timer clock. This calculator fixes a 1 MHz counter; the shown frequency includes integer rounding.
02 / USART
Understand BRR
OVER8=0: the BRR value is approximately PCLK1 / baud. Clock error and divider error both affect the real link.
Changing a profile here does not modify the downloaded firmware. The 18 checkpoints each state their own clock assumptions.
BUILD YOUR MENTAL MODEL
Notes from the bench.
The ideas that make the registers less mysterious, and the next interfaces to explore.
Two clocks, two jobs
The GPIO clock lets you configure the pin. The peripheral clock lets the internal circuit operate. You commonly need both. SysTick, CRC and DMA show why some circuits need no signal pins.
A register is an address
GPIOA starts at 0x40020000. BSRR is offset 0x18. CMSIS gives that address a readable C name: GPIOA->BSRR. It names hardware; it does not secretly initialize it.
Read before modifying
Use &= ~mask to clear a field, then |= value to set it. But command and status registers differ: BSRR is a write command; EXTI PR clears pending bits when you write 1.
Beyond the first 18 experiments
These are architecture guides and next steps. They are not complete peripheral drivers.
A logic analyzer makes the invisible visible.
A repeatable measurement habit
Connect ground first and use voltage-compatible inputs. Capture a known pattern: UART “U” (0x55), SPI 0xA5, or a 1 kHz PWM. Sample at least 10× the fastest signal of interest as a practical starting point, then inspect the raw edges before trusting a decoder. A digital analyzer cannot measure analog voltage accurately; use a meter or oscilloscope for ADC/DAC.
Sources & scope
Original teaching explanations and code; board mappings checked against UM1724 and DS10693, registers against RM0390 and ST CMSIS. Source checked with the real F446 CMSIS headers; no target linking or physical board testing. Simulated waveforms illustrate concepts and do not emulate the MCU. CDN assets require internet access.